Jtag-Arm9 - JTAG interface to the ARM9
by Simon Wood. July 2001

Jtag - Using port 0x378
jtag_reset:
JTAG interface reset.
Jtag:>Requesting HALT..
System HALTED in 32bit State
R0 is 0x91900030
PC is 0x8004F3F0
Jtag:>registers read
  BWSCON [90800000] = 22602200
BANKCON0 [90800004] = 00000700
BANKCON1 [90800008] = 00000700
BANKCON2 [9080000c] = 000057a4
BANKCON3 [90800010] = 00000700
BANKCON4 [90800014] = 00000700
BANKCON5 [90800018] = 000057a4
BANKCON6 [9080001c] = 00018009
BANKCON7 [90800020] = 00018009
 REFRESH [90800024] = 00ac03e4
BANKSIZE [90800028] = 000000b1
   MRSB6 [9080002c] = 00000030
   MRSB7 [90800030] = 00000030
...
  NFCONF [90e00000] = 00008952
...
LOCKTIME [90c00000] = 00ffffff
    MPLL [90c00004] = 0007f011
    UPLL [90c00008] = 00078023
  CLKCON [90c0000c] = 000dfff0
 CLKSLOW [90c00010] = 00000004
 CLKDIVN [90c00014] = 00000003
...
dma channel 0:
   DISRC [90b00000] = 5a00003c
  DISRCC [90b00004] = 00000000
   DIDST [90b00008] = 00000000
  DIDSTC [90b0000c] = 00000000
    DCON [90b00010] = 00000000
   DSTAT [90b00014] = 00000000
   DCSRC [90b00018] = 00000000
   DCDST [90b0001c] = 00000000
dma channel 1:
   DISRC [90b00020] = 00000000
  DISRCC [90b00024] = 00000000
   DIDST [90b00028] = 00000000
  DIDSTC [90b0002c] = 00000000
    DCON [90b00030] = 00000000
   DSTAT [90b00034] = 00000000
   DCSRC [90b00038] = 00000000
   DCDST [90b0003c] = 00000000
dma channel 2:
   DISRC [90b00040] = 00000000
  DISRCC [90b00044] = 00000000
   DIDST [90b00048] = 00000000
  DIDSTC [90b0004c] = 00000000
    DCON [90b00050] = 00000000
   DSTAT [90b00054] = 00000000
   DCSRC [90b00058] = 00000000
   DCDST [90b0005c] = 00000000
dma channel 3:
   DISRC [90b00060] = 00000000
  DISRCC [90b00064] = 00000000
   DIDST [90b00068] = 00000000
  DIDSTC [90b0006c] = 00000000
    DCON [90b00070] = 00000000
   DSTAT [90b00074] = 00000000
   DCSRC [90b00078] = 00000000
   DCDST [90b0007c] = 00000000
...
GPIO[A]:
     CON [91600000] = 005f2f24
     DAT [91600004] = 0020c059
      UP [91600008] = 00000000
         bit 0 -> pup=0, val=1, cfg=0
         bit 1 -> pup=0, val=0, cfg=0
         bit 2 -> pup=0, val=0, cfg=1
         bit 3 -> pup=0, val=1, cfg=0
         bit 4 -> pup=0, val=1, cfg=0
         bit 5 -> pup=0, val=0, cfg=1
         bit 6 -> pup=0, val=1, cfg=0
         bit 7 -> pup=0, val=0, cfg=0
         bit 8 -> pup=0, val=0, cfg=1
         bit 9 -> pup=0, val=0, cfg=1
         bit 10 -> pup=0, val=0, cfg=1
         bit 11 -> pup=0, val=0, cfg=1
         bit 12 -> pup=0, val=0, cfg=0
         bit 13 -> pup=0, val=0, cfg=1
         bit 14 -> pup=0, val=1, cfg=0
         bit 15 -> pup=0, val=1, cfg=0
         bit 16 -> pup=0, val=0, cfg=1
         bit 17 -> pup=0, val=0, cfg=1
         bit 18 -> pup=0, val=0, cfg=1
         bit 19 -> pup=0, val=0, cfg=1
         bit 20 -> pup=0, val=0, cfg=1
         bit 21 -> pup=0, val=1, cfg=0
         bit 22 -> pup=0, val=0, cfg=1
         bit 23 -> pup=0, val=0, cfg=0
         bit 24 -> pup=0, val=0, cfg=0
         bit 25 -> pup=0, val=0, cfg=0
         bit 26 -> pup=0, val=0, cfg=0
         bit 27 -> pup=0, val=0, cfg=0
         bit 28 -> pup=0, val=0, cfg=0
         bit 29 -> pup=0, val=0, cfg=0
         bit 30 -> pup=0, val=0, cfg=0
         bit 31 -> pup=0, val=0, cfg=0

GPIO[B]:
     CON [91600010] = 00155512
     DAT [91600014] = 000005bd
      UP [91600018] = 000007f7
       bit 0 -> TOUT0 (2) (up=1, val=1)
       bit 1 -> Input (0) (up=1, val=0)
       bit 2 -> Output (1) (up=1, val=1)
       bit 3 -> Input (0) (up=0, val=1)
       bit 4 -> Output (1) (up=1, val=1)
       bit 5 -> Output (1) (up=1, val=1)
       bit 6 -> Output (1) (up=1, val=0)
       bit 7 -> Output (1) (up=1, val=1)
       bit 8 -> Output (1) (up=1, val=1)
       bit 9 -> Output (1) (up=1, val=0)
       bit 10 -> Output (1) (up=1, val=1)
       bit 11 -> undefined
       bit 12 -> undefined
       bit 13 -> undefined
       bit 14 -> undefined
       bit 15 -> undefined

GPIO[C]:
     CON [91600020] = aa940659
     DAT [91600024] = 0000ebff
      UP [91600028] = 0000ffff
       bit 0 -> Output (1) (up=1, val=1)
       bit 1 -> VCLK (2) (up=1, val=1)
       bit 2 -> Output (1) (up=1, val=1)
       bit 3 -> Output (1) (up=1, val=1)
       bit 4 -> VM (2) (up=1, val=1)
       bit 5 -> Output (1) (up=1, val=1)
       bit 6 -> Input (0) (up=1, val=1)
       bit 7 -> Input (0) (up=1, val=1)
       bit 8 -> Input (0) (up=1, val=1)
       bit 9 -> Output (1) (up=1, val=1)
       bit 10 -> Output (1) (up=1, val=0)
       bit 11 -> VD3 (2) (up=1, val=1)
       bit 12 -> VD4 (2) (up=1, val=0)
       bit 13 -> VD5 (2) (up=1, val=1)
       bit 14 -> VD6 (2) (up=1, val=1)
       bit 15 -> VD7 (2) (up=1, val=1)

GPIO[D]:
     CON [91600030] = aa84aaa0
     DAT [91600034] = 0000aed0
      UP [91600038] = 0000faff
       bit 0 -> Input (0) (up=1, val=0)
       bit 1 -> Input (0) (up=1, val=0)
       bit 2 -> VD10 (2) (up=1, val=0)
       bit 3 -> VD11 (2) (up=1, val=0)
       bit 4 -> VD12 (2) (up=1, val=1)
       bit 5 -> VD13 (2) (up=1, val=0)
       bit 6 -> VD14 (2) (up=1, val=1)
       bit 7 -> VD15 (2) (up=1, val=1)
       bit 8 -> Input (0) (up=0, val=0)
       bit 9 -> Output (1) (up=1, val=1)
       bit 10 -> Input (0) (up=0, val=1)
       bit 11 -> VD19 (2) (up=1, val=1)
       bit 12 -> VD20 (2) (up=1, val=0)
       bit 13 -> VD21 (2) (up=1, val=1)
       bit 14 -> VD22 (2) (up=1, val=0)
       bit 15 -> VD23 (2) (up=1, val=1)

GPIO[E]:
     CON [91600040] = a52aa955
     DAT [91600044] = 00003fe0
      UP [91600048] = 0000f7ff
       bit 0 -> Output (1) (up=1, val=0)
       bit 1 -> Output (1) (up=1, val=0)
       bit 2 -> Output (1) (up=1, val=0)
       bit 3 -> Output (1) (up=1, val=0)
       bit 4 -> Output (1) (up=1, val=0)
       bit 5 -> SDCLK (2) (up=1, val=1)
       bit 6 -> SDCMD (2) (up=1, val=1)
       bit 7 -> SDDAT0 (2) (up=1, val=1)
       bit 8 -> SDDAT1 (2) (up=1, val=1)
       bit 9 -> SDDAT2 (2) (up=1, val=1)
       bit 10 -> SDDAT3 (2) (up=1, val=1)
       bit 11 -> Input (0) (up=0, val=1)
       bit 12 -> Output (1) (up=1, val=1)
       bit 13 -> Output (1) (up=1, val=1)
       bit 14 -> IICSCL (2) (up=1, val=0)
       bit 15 -> IICSDA (2) (up=1, val=0)

GPIO[F]:
     CON [91600050] = 0000a82a
     DAT [91600054] = 000000d7
      UP [91600058] = 000000ff
       bit 0 -> EINT0 (2) (up=1, val=1)
       bit 1 -> EINT1 (2) (up=1, val=1)
       bit 2 -> EINT2 (2) (up=1, val=1)
       bit 3 -> Input (0) (up=1, val=0)
       bit 4 -> Input (0) (up=1, val=1)
       bit 5 -> EINT5 (2) (up=1, val=0)
       bit 6 -> EINT6 (2) (up=1, val=1)
       bit 7 -> EINT7 (2) (up=1, val=1)
       bit 8 -> undefined
       bit 9 -> undefined
       bit 10 -> undefined
       bit 11 -> undefined
       bit 12 -> undefined
       bit 13 -> undefined
       bit 14 -> undefined
       bit 15 -> undefined

GPIO[G]:
     CON [91600060] = ffaaaaa2
     DAT [91600064] = 0000e7ef
      UP [91600068] = 0000ffff
       bit 0 -> EINT8 (2) (up=1, val=1)
       bit 1 -> Input (0) (up=1, val=1)
       bit 2 -> EINT10 (2) (up=1, val=1)
       bit 3 -> EINT11 (2) (up=1, val=1)
       bit 4 -> EINT12 (2) (up=1, val=0)
       bit 5 -> EINT13 (2) (up=1, val=1)
       bit 6 -> EINT14 (2) (up=1, val=1)
       bit 7 -> EINT15 (2) (up=1, val=1)
       bit 8 -> EINT16 (2) (up=1, val=1)
       bit 9 -> EINT17 (2) (up=1, val=1)
       bit 10 -> EINT18 (2) (up=1, val=1)
       bit 11 -> EINT19 (2) (up=1, val=0)
       bit 12 -> XMON (3) (up=1, val=0)
       bit 13 -> nXPON (3) (up=1, val=1)
       bit 14 -> YMON (3) (up=1, val=1)
       bit 15 -> nYPON (3) (up=1, val=1)

GPIO[H]:
     CON [91600070] = 0000aaa6
     DAT [91600074] = 000006bc
      UP [91600078] = 000007ff
       bit 0 -> nCTS0 (2) (up=1, val=0)
       bit 1 -> Output (1) (up=1, val=0)
       bit 2 -> TXD0 (2) (up=1, val=1)
       bit 3 -> RXD1 (2) (up=1, val=1)
       bit 4 -> TXD1 (2) (up=1, val=1)
       bit 5 -> RXD1 (2) (up=1, val=1)
       bit 6 -> TXD2 (2) (up=1, val=0)
       bit 7 -> RXD2 (2) (up=1, val=1)
       bit 8 -> Input (0) (up=1, val=0)
       bit 9 -> Input (0) (up=1, val=1)
       bit 10 -> Input (0) (up=1, val=1)
       bit 11 -> undefined
       bit 12 -> undefined
       bit 13 -> undefined
       bit 14 -> undefined
       bit 15 -> undefined

...
  MISCCR [91600080] = 00010330
		-> data bus pull ups enabled
		-> usb device enabled
		-> clksel0 = hclk
		-> clksel1 = hclk
		-> nRSTOUT=1

 DCLKCON [91600084] = 00000000
		-> neither dclk enabled

 EXTINT0 [91600088] = 66722646
 EXTINT1 [9160008c] = 67777777
 EXTINT2 [91600090] = 22226666
EINTFLT0 [91600094] = 00000000
EINTFLT1 [91600098] = 00000000
EINTFLT2 [9160009c] = 00000000
EINTFLT3 [916000a0] = 00000000
EINTMASK [916000a4] = 00f00210
EINTPEND [916000a8] = 00000000
GSTATUS0 [916000ac] = 0000000b
GSTATUS1 [916000b0] = 32410000
GSTATUS2 [916000b4] = 00000000
GSTATUS3 [916000b8] = 00000000
GSTATUS4 [916000bc] = 00000000
...
   TCFG0 [91100000] = 00001818
   TCFG1 [91100004] = 00010310
    TCON [91100008] = 00501109
  TCNTB0 [9110000c] = 00000031
  TCMPB0 [91100010] = 00000016
  TCNTO0 [91100014] = 00000013
  TCNTB1 [91100018] = 00001275
  TCMPB1 [9110001c] = 00000000
  TCNTO1 [91100020] = 00000000
  TCNTB2 [91100024] = 0000a4cb
  TCMPB2 [91100028] = 00000000
  TCNTO2 [9110002c] = 00000000
  TCNTB3 [91100030] = 00000000
  TCMPB3 [91100034] = 00000000
  TCNTO3 [91100038] = 00000000
  TCNTB4 [9110003c] = 000049d4
  TCNTO4 [91100040] = 00000b20

  UBRDIV = CLK / (bps * 16) - 1

  (bps * 16) = (CLK / UBRDIV+1)

  PCLK = 67500000

UART 0:
   ULCON [91000000] = 00000003 (8 bit, 1stop, no parity)
    UCON [91000004] = 000003c5
			-> rx = interrupt / poll
			-> tx = interrupt / poll
			-> rx errors
			-> rx timeout enable
			-> rx irq level
			-> tx irq level
   UFCON [91000008] = 00000051
			-> fifo enabled
			-> tx fifo level 4 bytes
			-> rx fifo level 4 bytes
  UBRDIV [91000028] = 00000008
			-> bps = 468750 baud

UART 1:
   ULCON [91004000] = 00000003 (8 bit, 1stop, no parity)
    UCON [91004004] = 00000245
			-> rx = interrupt / poll
			-> tx = interrupt / poll
			-> rx errors
			-> rx irq pulse
			-> tx irq level			-> 
   UFCON [91004008] = 00000000
			-> no fifo
  UBRDIV [91004028] = 0000001b
			-> bps = 150669

UART 2:   (IR transceiver)
   ULCON [91008000] = 00000043  (IR, 8bit, 1stop, no parity)
    UCON [91008004] = 000003c5
			-> rx = interrupt / poll
			-> tx = interrupt / poll
			-> rx errors
			-> rx timeout enable
			-> rx irq level
			-> tx irq level
   UFCON [91008008] = 00000051
			-> fifo enabled
			-> tx fifo level 4 bytes
			-> rx fifo level 4 bytes
  UBRDIV [91008028] = 000001b6

	bps = 9609 bps

...
 LCDCON1 [90d00000] = 03140c79
 LCDCON2 [90d00004] = 00000000
 LCDCON3 [90d00008] = 0098ef07
 LCDCON4 [90d0000c] = 00000000
 LCDCON5 [90d00010] = 00014a01
LCDSADDR1 [90d00014] = 00000000
LCDSADDR2 [90d00018] = 0001fc00
LCDSADDR3 [90d0001c] = 00000000
    TPAL [90d00050] = 00000000
LCDINTPND [90d00054] = 00000000
LCDSRCPND [90d00058] = 00000003
LCDINTPND [90d0005c] = 00000000
  LPCSEL [90d00060] = 00000002
...
  ADCCON [91800000] = 0000cc78
  ADCTSC [91800004] = 000000d3
  ADCDLY [91800008] = 00002710
...
  SDICON [91a00000] = 00000000
  SDIPRE [91a00004] = 00000003
SDIDTIMER [91a00024] = 0000ffff
SDIBSIZE [91a00028] = 00000200
 SDIDCON [91a0002c] = 000a0001
...
HcRevision [90900000] = 00000010
HcControl [90900004] = 00000000
HcCommonStatus [90900008] = 00000000
HcRhDescriptorA [90900048] = 02001202
HcRhDescriptorB [9090004c] = 00000000
HcRhStatus [90900050] = 00000000
HcRhPortStatus1 [90900054] = 00000100
HcRhPortStatus2 [90900058] = 00000100
...
  IISCON [91500000] = 0000010a
  IISMOD [91500004] = 00000049
  IISPSR [91500008] = 000000a5
 IISFCON [9150000c] = 00004000
...
  IICCON [91400000] = 0000002a
 IICSTAT [91400004] = 00000030
 IICADRR [91400008] = 000000ca
...
SPI channel 0:
  SPICON [91900000] = 00000000
   SPPIN [91900004] = 00000001
   SPPRE [91900008] = 00000000
SPI channel 1:
  SPICON [91900020] = 00000000
   SPPIN [91900024] = 00000001
   SPPRE [91900028] = 00000000
Jtag:>