Re: FYI: asic3_base: clocks and ds1wm support (+ soc-core usage)

From: Paul Sokolovsky <pmiscml_at_gmail.com>
Date: Thu, 28 Dec 2006 02:38:40 +0200

Hello Ian,

Wednesday, December 27, 2006, 2:14:25 PM, you wrote:

> Paul Sokolovsky wrote:
>> Hello Ian,

>>> 1) I don't like the SIGNED_SHIFT macro, whats the point in it?
>>
>> Just as the name suggests, to shift by signed bit count, with
>> expected meaning of shifting by negative number being the shift in
>> the opposite direction, i.e. (0x10 << -2) == (0x10 >> 2).

> I got that, but I havent seen anything like it in the rest of the kernel
> and I've used -ve shifts before without ill effects.

> I'd say either convince LKML to use the macro or ditch it. (assuming a
> test shows -ve shifts do indeed work)

http://www.open-std.org/jtc1/sc22/wg14/www/docs/n1124.pdf
http://std.dkuug.dk/JTC1/SC22/WG14/www/docs/n843.htm
http://www.vmunix.com/~gabor/c/draft.html
http://c0x.coding-guidelines.com/6.5.7.html

  Search for "If the value of the right operand is negative or is
greater than or equal to the width of the promoted left operand,
the behavior is undefined."

http://www.arm.com/pdfs/QRC0001_UALside2.pdf

  Search for:

Register, optionally shifted by constant
Logical shift left Rm, LSL #<shift> Allowed shifts 0-31
Logical shift right Rm, LSR #<shift> Allowed shifts 1-32

-- 
Best regards,
 Paul                            mailto:pmiscml_at_gmail.com
Received on Wed Dec 27 2006 - 19:38:44 EST

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