On Wed, 23 Aug 2000 11:20:18 -0600, Dirk Grunwald wrote:
> How does this code differ from the clock scaling code in the Itsy distribution?
> That version also has driver callbacks so that device drivers can shutdown
> and restart following a clock change. This would be a good thing to mandate,
> although it was not always necessary.
It differs in that this version does it The Right Way (tm). The Itsy code
did the actual clock scaling code in ROM with interrupts disabled, this
version does everything from DRAM with interrupts enabled. Doing it in RAM
is possible as long as every step in the RAM timing reprogramming yields a
valid memory setup. The advantage is clear: no special ROM requirements so
it is portable to all SA11x0 platforms. I did (together with Johan
Pouwelse) the original SA1100 implementation, Erik Bunce ported it to the
SA1110.
The driver doesn't yet have a callback mechanism, and I doubt we really
need it. AFAIK the only things that depend on the clock speed are the
BogoMIPS and the memory timings (ROM, SRAM, DRAM, PCMCIA).
> We used that version of clock scaling with a modified Itsy motherboard that
> had two levels of voltage scaling (1.5 and 1.23V to the CPU). We had small
> energy savings using voltage scaling, but the chip wasn't designed for that.
We got even further: an SA1100 needs only 0.8V at 58MHz, and that's on the
safe side. The upper bound is 2.0V: above that two of our LARTs died :-(.
> The "safe" speed at which to run varies from chip to chip. AFAIK, there is no
> provision for multiple voltages in the iPAQ. I can send you a paper that will
> appear in OSDI with the results of our experiments with this. In the absence of
> other existing infrastructure that uses clock/voltage scaling, I would like to
> maintain compability with the Itsy version.
Why? The Itsy Linux version had power manager functionality, but that was
only because the main Linux kernel didn't have it at that time. The
current linux-2.4.0 has a nice power manager framework, it only has to be
filled in in the SA11x0 tree. I'd rather have something compatible with
the main-stream linux tree.
> The SA-2 architecture supports voltage scaling. The SA-2 core (what
> would be equivilent to the SA-110) allegedly scales from 600Mhz to 150Mhz
> and power goes from 450mw to 40mw across that range. Once you account
> for clock scaling, this is a ~3x energy reduction.
Ehm, where can I get samples? Last time I looked on the Intel site the
SA-2 was just announcement.
Erik
-- LART. 250 MIPS under one Watt. Free hardware design files. http://www.lart.tudelft.nl/Received on Thu Aug 24 14:56:34 2000
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