Re: [iPAQ] cpu speed

From: Erik Mouw <J.A.K.Mouw.a.t.ITS.TUDelft.NL>
Date: Fri Oct 13 2000 - 05:38:38 EDT

On Fri, Oct 13, 2000 at 03:39:55AM -0500, Sonny Mounicou wrote:
> In digging throught the kernel code, I found how clockable this cpu
> is. I also found that the speed was defaulting to 192 MHz instead of
> 206 MHz.

192 MHz is probably the maximum speed of this CPU (I don't have an iPaq
so I can't check). There are many SA1110 CPU variants that differ in
core voltage and hence maximum CPU speed.

> On line 340, I found in arch/arm/kernel/scale.c:
> static const scale_platform_data_t bitsy_platform_data =
> {
> 1,
> 9, /* Default speed: 191.7 MHz */
> 12, /* Speed limit: 235.9 MHz - heard rumor YMMV */
> sa11x0_3_6864_speeds,
> { bitsy_freq_regs }
> };
>
> Looking at the code, we can change the 9 to a 10 and this would give us
> our 206 MHz.

No. The initial CPU speed is set in the boot loader. You have to
compile scale.c as a kernel module, insert the module in the kernel and
use "echo 10 > /proc/scale" to get it at 206 MHz.

> Would this be an acceptable change?

You have to be careful, because all timings depend on the CPU core
speed. So you also have to adjust the PCMCIA and LCD timings (memory
timings are already taken care of). Another thing to worry about is
sound: I don't know how the UDA1341 clock is connected, but if it
derives a clock from a memory clock (like the Intel Assabet), sound
will stop working or at least sound faster or slower.

Erik

-- 
J.A.K. (Erik) Mouw, Information and Communication Theory Group, Department
of Electrical Engineering, Faculty of Information Technology and Systems,
Delft University of Technology, PO BOX 5031,  2600 GA Delft, The Netherlands
Phone: +31-15-2783635  Fax: +31-15-2781843  Email: J.A.K.Mouw@its.tudelft.nl
WWW: http://www-ict.its.tudelft.nl/~erik/
Received on Fri Oct 13 02:47:40 2000

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