On Tue, 2005-04-26 at 16:27 -0700, Matthew Reimer wrote:
> Couldn't we just watch SDIDSTA[RxDatOn] or SDIFSTA[RFDET] or SDIFSTA[RFHalf],
> and when data starts flowing into the FIFO, then we set DREQEN? It's
> basically software-controlled DREQ.
How would you turn DREQEN off again when the FIFO is empty?
To be honest, it seems hard to imagine that a DMA solution based on
polling the status register would be any more efficient than a plain PIO
arrangement.
p.
Received on Tue Apr 26 2005 - 19:51:34 EDT
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