Jerome Debard wrote:
>Hi Gert,
>
>From the output you sent, it looks like your flash interface is not working
>properly. Sometimes the manufacturer id is correct (0x89, Intel if i'm not
>wrong), other times it's wrong. Did you try to check the integrity of the
>JTAG chain signals ? It's important that the signals TCK, TDI, TDO and TMS
>are clean (especially TCK).
>You could also test with a lower frequency (see frequency and help
>functions).
>You could also test the function detect several times to see if the
>detectflash function behavior can be reproduced with other operations.
>
>
>
I agree with Jerome, that there is likely a signal integrity problem.
Unfortunately, it's not enough to reduce the clock frequency if you're
having signal integrity problems. What matters is the high frequency
components of the edges of the clock signal. These high frequency
components can cause ringing on the clock line, leading to spurious
clock edges. The edge slew rate is usually fixed by the design of the
pin drivers. Some programmable logic has selectable edge rates, in
which case choose the slowest one for driving JTAG signals. The CMOS
chips used on the JTAG cables were chosen for their slow slew rates.
There are ways to improve the situation. Use shorter cables. Also, a
series resistor (e.g., 33-100 ohm) will dampen reflections which may be
enough to eliminate extra clock edges. A series inductor (e.g., 2nH)
will filter high frequency components as will a parallel capacitor.
Hope this helps,
Jamey
Received on Fri Nov 19 08:27:21 2004
This archive was generated by hypermail 2.1.8 : Fri Nov 19 2004 - 08:27:48 EST