Re: JTAG confusion

Joshua Wise wrote:

> So, now I can just go through in software frobbing the bits and seeing
> which outbits correspond to which inbits.
>
> PIN OUT IN
> ---------------
> I/O7 127 129
> I/O6 129 131
> I/O5 131 133
> I/O4 133 135
> I/O3 135 137
> I/O2 137 139
> I/O1 139 141
> I/O0 141 144 (!)

This does not look right to me. In the boundary scan chains I've seen,
an I/O pin will have two unique bit-registers -- one for output and one
for input -- and a control bit-register that is usually shared across a
bus or segment of a bus. I expect that there is a cell that controls
whether the output bits above actually drive a value on a pin. But the
problem I have with this chain is that a bit in the chain could be an
output for I/O6 and input for I/O7. I suppose it's possible, but I
would look at the intermediate bits again: 128, 130, etc. Usually the
input and output bits are adjacent.

Nevertheless, good work! I know this is tedious. I did send another
note to the ASIC vendor to see if we can get a spec but have not heard back.

Jamey
Received on Sat Sep 18 08:20:04 2004